Recent advances in semiconductor fabrication techniques have dramatically increased the density and speed of semiconductor devices, leading to a corresponding effort in the field of semiconductor packaging, where increased device density gives rise to many challenges related to electrical connectivity, heat-transfer, manufacturability, and the like. In this regard, a major trend in semiconductor packaging is toward low-profile, high-density device packages such as the various ball grid array (BGA) and fine ball grid array (FBGA) packages.
This increase in device density also poses problems for board-level testing, assembly qualification, debug, and other such test procedures. Modern printed circuit boards (PCBs) and modules typically include a large number of devices in a relatively small space. As a result, it is often difficult or impossible to electrically probe individual devices (particularly BGA devices) during testing, as the required bond pads or contacts are not typically exposed for easy access.
Known methods of facilitating device testing include the insertion of “interposers” between the device and board. These interposers typically include a series of probe contacts provided one or more sides of the device under test. Space limitations in high-density assemblies prohibit the use of such large, rigid interposers to provide probing capability, as surrounding devices often interfere with optimal placement of such interposers. Furthermore, this class of interposer may detach from the board or reflow during subsequent attachment of the semiconductor device to the interposer pads.
Moreover, known interposers are unsatisfactory in that they provide a single probe point for each terminal. This limitation reduces test flexibility and makes it extremely difficult to determine where continuity issues may exist, for example, open circuits resulting from mechanical overstress of conductive traces formed within the interposer.